Marvin Saß

Hardware security researcher, TU Berlin

Publications

2026

The σ₀ Side Channel: Practical Single-Trace Attack on NIST SP 800-90A Hash-DRBG
Xhani Marvin Saß and Jean-Pierre Seifert
IACR Transactions on Cryptographic Hardware and Embedded Systems · To appear
Reverse to Reveal: Reversibility as a Fault Defense
Xhani Marvin Saß, Meng Yuan and Jean-Pierre Seifert
Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC) · To appear
Do MCUs Dream of Electric Earth? Revisiting Voltage Fault Injection Through Ground Manipulation
Xhani Marvin Saß, Ran Zhang and Jean-Pierre Seifert
Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC) · To appear
The Glitch for Majorities: Breaking Spatial Redundancy Countermeasures
Xhani Marvin Saß, Orr Dunkelman and Jean-Pierre Seifert
IEEE International Symposium on Hardware Oriented Security and Trust (HOST) · To appear

2025

From NOP to ADD and Beyond: A Novel Fault-Model Comprising Variable-Length Instruction Sets
Xhani Marvin Saß, Thomas Martin Johannes Lehrach and Jean-Pierre Seifert
Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC)

2024

Through the Looking-Glass: Sensitive Data Extraction by Optical Probing of Scan Chains
Tuba Kiyan, Lars Renkes, Marvin Sass, Antonio Saavedra, Norbert Herfurth, Elham Amini and Jean-Pierre Seifert
IACR Transactions on Cryptographic Hardware and Embedded Systems

2023

Modulation to the Rescue: Identifying Sub-Circuitry in the Transistor Morass for Targeted Analysis
Xhani Marvin Saß, Thilo Krachenfels, Frederik Dermot Pustelnik, Jean-Pierre Seifert and Frank Altmann
Workshop on Attacks and Solutions in Hardware Security (ASHES)
Oops..! I Glitched It Again! How to Multi-Glitch the Glitching-Protections on ARM TrustZone-M
Xhani Marvin Saß, Richard Mitev and Ahmad-Reza Sadeghi
32nd USENIX Security Symposium (USENIX Security 23)

Preprints

Recent work, not yet published.

SE-SDs: Self-Encrypting SD-Cards – A Threat Model and Security Analysis
Xhani Marvin Saß and Jean-Pierre Seifert
2026